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5th IEEE International Workshop on Silicon Debug and Diagnosis (SDD08)
Wednesday April 30th (4pm - 7pm) - Thursday May 1st (8am - 5pm), 2008
Rancho Bernardo Inn
San Diego, California, USA

Held in Conjunction with IEEE VLSI Test Symposium 2008 (VTS 2008)

http://www.sdd-online.org

CALL FOR PAPERS

Scope and Mission -- Author Information -- Committees

Scope and Mission

Troubleshooting how and why systems and circuits fail is important and is rapidly growing in industry significance. Debug and diagnosis may be needed for yield improvement, process monitoring, correcting the design function, failure mode learning for R&D, or just getting a working first prototype. This detective work can however become very tricky. Sources of difficulty include circuit and system complexity, packaging, limited physical access, shortened product creation cycle and time-to-market, the traditional focus on only pass/fail testing and missing tool and equipment capabilities. New and efficient solutions for debug and diagnosis will have a much needed and highly visible impact on productivity.

SDD08 will be held in San Diego, California, USA. It is the fifth in a series of highly successful technical workshops. Its mission and objective is to consider all issues related to debug and diagnosis of systems and circuits – from prototype bring-up to volume production.

The topics of interest include, but are not limited to, the following:

  • Debug Techniques and Methodologies
  • Design and Synthesis for Debug
  • DFT Reuse for Debug and Diagnosis
  • Debug & Diagnosis Architectures Tools
  • Debug Standardization
  • Microprocessor, FPGA, IP, SOC Debug
  • Infrastructure IP for SDD
  • Debug & Diagnosis Architectures
  • Manufacturing & Prototype Environment
  • Equipment Impact and Techniques
  • Digital/Analog Turn-on
  • Cross-geography turn-on, debug & diagnosis issues
  • SDD vs. Yield & TTM
  • Case Studies
Author Information
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The workshop objective is to facilitate a valuable interactive information exchange. Contributions ranging from extended abstracts to full papers are acceptable for submission. Contributions that provide more detail have a higher chance of being accepted. Proposals that describe open issues, industry/technology needs or opinions are also welcome.

Length Guideline: ranging from a one page, extended abstract up to 8 pages
Submissions due: March 7th, 2008
Acceptance Notification: March 21st, 2008
Final papers for inclusion into informal proceedings: April 1st, 2008

Proposals for discussion panels and other special sessions are also invited.  Please submit a one page abstract for these to the web site or contact the Program Chair or Special Sessions Chair.

For general information contact:

Fidel Muradali
National Semiconductors

Email: fidel.muradali@nsc.com

For submission & program information contact:

Bart Vermeulen
NXP Semiconductors
Email: bart.vermeulen@nxp.com  

Committees
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General Chair
F. Muradali – National Semiconductor

Program Chair
B. Vermeulen – NXP Semiconductors

Finance Chair
M. Ricchetti – AMD

Special Sessions
T. McLaurin – ARM

Asian Liaison
K. Hatayama – STARC

European Liaison
D. Appello - STMicroelectronics

University Liaison
N. Nicolici – McMaster Univ.

Local Arrangements
TBD

Electronic Media
I. Bayraktaroglu – Sun

Program Committee
M. Abramovici – DAFCA
C. Boit – TU Berlin
W-T Cheng – Mentor Graphics
B. Cory – nVidia
A. Crouch – Inovys
J. Giacobbe – Intel
S. Gupta - USC
I. Hartanto – Xilinx
Y-C. Hsu – Novas
D. Josephson – Intel
R. Kapur – Synopsys
H. Kerkhoff – Univ. Twente
C. Landrault  – LIRMM
C. Metra – Univ. Bologna
Y. Okuda – Sony
A. Orailoglu – UCSD
P. Prinetto – Poli. Di Torino
M. Renovell – LIRMM
M.S. Reorda – Poli. Di Torino
N. Stollon – HDLdynamics
C. Sul – Silicon Image
J. Tyzer – U. Poznan
S. Venkataraman – Intel
B. West
Z. Zilic – McGill Univ.

Steering Committee
R. Aitken – ARM
F. Muradali – National Semiconductor
E.J. Marinissen – NXP Semi.
M. Ricchetti – AMD (Chair)
Y. Zorian – Virage Logic

For more information, visit us on the web at: http://www.sdd-online.org

The 5th IEEE International Workshop on Silicon Debug and Diagnosis (SDD07) is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC).


IEEE Computer Society- Test Technology Technical Council

TTTC CHAIR
Adit D. SINGH
Auburn University - USA
Tel. +1-334-844-1847
E-mail adsingh@eng.auburn.edu

SENIOR PAST CHAIR
Yervant ZORIAN
Virage Logic - USA
Tel. +1-510-360-8035
E-mail yervant.zorian@viragelogic.com

TTTC 2ND VICE CHAIR
Chen-Huan CHIANG

Lucent Technologies
- USA
Tel. +1-732-949-5539
E-mail chenhuan@lucent.com

FINANCE
Adit D. SINGH
Auburn University - USA
Tel. +1-334-844-1847
E-mail adsingh@eng.auburn.edu

DESIGN & TEST MAGAZINE
Tim CHENG
University of California, Santa Barbara - USA
Tel. +1-805-893-72942
E-mail timcheng@ece.ucsb.edu

TECHNICAL MEETINGS
Chen-Huan CHIANG

Lucent Technologies
- USA
Tel. +1-732-949-5539
E-mail chenhuan@lucent.com

TECHNICAL ACTIVITIES
Victor Hugo CHAMPAC
Instituto Nacional de Astrofisica - Mexico
Tel.+52-22-470-517
E-mail champac@inaoep.mx

ASIA & SOUTH PACIFIC
Hideo FUJIWARA
Nara Institute of Science and Technology - Japan
Tel. +81-74-372-5220
E-mail fujiwara@is.aist-nara.ac.jp

LATIN AMERICA
Marcelo LUBASZEWSKI
Federal University of Rio Grande do Sul - Brazil
Tel. +34-93-401-6603
E-mail luba@vortex.ufrgs.br

NORTH AMERICA
William R. MANN
Tel. +1-949-645-3294
E-mail william.mann@ieee.org

COMMUNICATIONS
Adit D. SINGH
Auburn University - USA
Tel. +1-334-844-1847
E-mail adsingh@eng.auburn.edu

INDUSTRY ADVISORY BOARD
Yervant ZORIAN
Virage Logic - USA
Tel. +1-510-360-8035
E-mail yervant.zorian@viragelogic.com

 

PAST CHAIR
André IVANOV
University of British Columbia - Canada
Tel. +1-604-822-6936
E-mail ivanov@ece.ubc.ca

TTTC 1ST VICE CHAIR
Michael NICOLAIDIS
TIMA Laboratory - France
Tel. +33-4-765-74696
E-mail michael.nicolaidis@imag.fr

SECRETARY
Christian LANDRAULT
LIRMM - France
Tel. +33-4-674-18524
E-mail landrault@lirmm.fr

INTERNATIONAL TEST CONFERENCE
Jill E. SIBERT
Raspberry Comm.
- USA
Tel. +1-484-894-1111
E-mail jill_sibert@raspberrycom.com

TEST WEEK COORDINATION
Yervant ZORIAN
Virage Logic - USA
Tel. +1-510-360-8035
E-mail yervant.zorian@viragelogic.com

TUTORIALS AND EDUCATION
Dimitris GIZOPOULOS

University of Piraeus
- Greece
Tel. +30-210-414-2372
E-mail dgizop@unipi.gr

STANDARDS
Rohit KAPUR

Synopsys
- USA
Tel. +1-650-934-1487
E-mail rkapur@synopsys.com

EUROPE
Zebo PENG
Linköping University - Sweden
Tel. +46-13-282-067/-281-000
E-mail zpe@ida.liu.se

MIDDLE EAST & AFRICA
Ibrahim HAJJ
American University of Beirut - Lebanon
Tel. +961-1-341-952
E-mail ihajj@aub.edu.lb

STANDING COMMITTEES
Michael NICOLAIDIS
TIMA Laboratory - France
Tel. +33-4-765-74696
E-mail michael.nicolaidis@imag.fr

ELECTRONIC MEDIA
Alfredo BENSO
Politecnico di Torino - Italy
Tel. +39-011-564-7080
E-mail alfredo.benso@polito.it


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